Technical Field
The present invention relates to a method of processing a semiconductor substrate that includes bonding a supporting plate to a semiconductor substrate and separating the bonded supporting plate from the semiconductor substrate, as well as to a method of manufacturing a semiconductor device in which the processing method is used.
Background Art
Vertical power devices include a plurality of layers formed by diffusing or implanting impurities into a semiconductor substrate. Of these layers, the drift layer (the layer along which carriers drift due to the electric field) tends to exhibit a higher electrical resistance than the other layers. Forming this drift layer too thickly results in a significant increase in the on-voltage and the forward voltage drop of the device, which tends to cause an undesirable increase in the normal operation loss of the device. Therefore, there is demand to reduce the thickness of the drift layer to the minimum thickness at which the required breakdown voltage can still be achieved.
The simplest method of reducing the thickness of the drift layer is to use a thinner semiconductor substrate. To achieve a voltage rating of 600V, an Si substrate with a thickness on the order of 100 μm or an SiC substrate with a thickness on the order of 10 μm may be used, for example. Furthermore, configurations that include a field-stop layer inhibit expansion of the depletion layer, thereby making it possible to further reduce the thickness of the semiconductor substrate.
However, semiconductor substrates with a thickness of less than or equal to 100 μm are more prone to warping due to applied stress and are also more prone to cracking and chipping due to their low mechanical strength, thereby increasing the difficulty associated with handling such substrates. In particular, while SiC substrates are harder than Si substrates, SiC substrates have low elasticity and become increasingly prone to cracking as the thickness decreases. This can potentially result in significant decreases in manufacturing efficiency and yield rates for devices produced using such SiC substrates.
One possible solution to this problem is a manufacturing method that starts with using a relatively thick semiconductor substrate in order to reduce the potential for cracking or chipping and then reducing the thickness of the semiconductor substrate before the end of the manufacturing method to produce a thin, finished semiconductor substrate.
More specifically, as illustrated in FIG. 5A, the process starts with a thick semiconductor substrate 101, and the required semiconductor functional regions 103 are formed on the front surface 102 of the semiconductor substrate 101. Next, as illustrated in FIG. 5B, the semiconductor substrate 101 is reinforced by bonding a supporting plate 105 to the front surface 102 of the semiconductor substrate 101 using an adhesive layer 104, and a chemical mechanical polishing (CMP) process or the like is applied to reduce the thickness of the semiconductor substrate 101 to the proper design thickness. Then, as illustrated in FIG. 5C, the required rear surface functional layer 107 is formed on the rear surface 106 of the reduced-thickness semiconductor substrate. Finally, as illustrated in FIG. 5D, the supporting plate 105 is removed, thereby leaving the thin semiconductor substrate 101 remaining. During this process, the semiconductor substrate 101 is reinforced by the supporting plate 105, which provides high mechanical and physical strength and makes it easier to handle the semiconductor substrate.
Patent Document 1, for example, discloses a method of manufacturing an SiC device in which an SiC substrate and a supporting plate are bonded together using a wax, adhesive tape, an adhesive, or the like, and during a heat treatment performed after the bonding process, a local annealing method such as laser annealing is used so that no thermal load is applied to the adhesive.
Meanwhile, Patent Document 2 discloses a method of manufacturing a bonded substrate that includes: forming, on a surface of at least one of a group III-nitride semiconductor substrate and a first supporting plate, a first buffer film having a surface with a surface roughness Rrms of 0.1 to 10,000 nm; and bonding the group III-nitride semiconductor substrate to the first supporting plate.